ANANNYA MAITI 1 , KOUSTUV CHAKRABORTY 2 , RAZIA SULTANA3 , SANTANU MAITY4. Design and implementation of 4-bit Vedic Multiplier. International Journal of Emerging Trends in Science and Technology, [S. l.], v. 3, n. 05, p. 3865–3868, 2016. Disponível em: http://ijetst.in/index.php/ijetst/article/view/1062. Acesso em: 24 feb. 2025.